plesiochronous

adj.

准同步的；

plesiochronous
plesiochronous
Plesiochronous
METHOD FOR MAINTAINING PLESIOCHRONOUS ENTITIES
Low-latency plesiochronous data retiming
5 Gb/s bidirectional balanced-line link compliant with plesiochronous clocking
A 2B parallel 1.25 Gb/s interconnect I/O interface with self-configurable link and plesiochronous clocking
5 Gb/s bidirectional balanced-line link compliant with plesiochronous clocking
A 2-Byte Parallel 1.25 Gb/s Interconnect I/O Interface with Self-Configurable Link and Plesiochronous Clocking
A 285 MHz 6-port plesiochronous router chip with non-blocking cross-bar switch
A 9.6 GigaByte/s throughput plesiochronous routing chip
A 9.6 GigaByte/s Throughput Plesiochronous Routing Chip
Design and implementation of a plesiochronous multi-core 4x4 network-on-chip FPGA platform with MPI HAL support