权威例句
SDRAM interfaces slashes pin count基于FPGA的SDRAM控制器设计基于FPGA的SDRAM控制器设计Towards InGaAs MSDRAM Capacitor-Less CellsA 256-Mb SDRAM using a register-controlled digital DLLA 256 Mb SDRAM using a register-controlled digital DLLPredator: a predictable SDRAM memory controllerPredator : a predictable SDRAM memory controllerA 2.5 ns clock access 250 MHz 256 Mb SDRAM with a synchronous mirror delayA 2.5-ns clock access, 250-MHz, 256-Mb SDRAM with synchronous mirror delay